Thursday, February 9, 2017

LTE - PHY - CRC Calculation


LTE - PHY - CRC Calculation

Lets see the Transport channel functionality on the LTE eNodeB PHY layer. Transport channel is present between the MAC & PHY.
The Transport channel functionalities are provided by DSP part of the L1/L2 Chip before feeding the information to RF transceiver.

CRC Calculation & Attachment:
The Output of the Logical channel is the Transport Block. This is provided as the input stream to Transport channel. So for better error detection mechanism,
each Transport Block is padded with CRC bits or parity bits.

Input bits  = a0 , a1 , a2 , a3 ,..., aA−1 where A is the Size of the Input sequence in bits.
Parity bits = p0 , p1 , p2 , p3 ,..., pL−1 where L is the number of parity bits.

The parity bits are generated by one of the following cyclic generator polynomials:

If Parity Bit L = 24:
- gCRC24A(D) = [D24 + D23 + D18 + D17 + D14 + D11 + D10 + D7 + D6 + D5 + D4 + D3 + D + 1] and
- gCRC24B(D) = [D24 + D23 + D6 + D5 + D + 1]
If Parity Bit L = 16:
- gCRC16(D) = [D16 + D12 + D5 + 1]
If Parity Bit L = 08:
- gCRC8(D) = [D8 + D7 + D4 + D3 + D + 1]

So for Example if the Input stream is 100 bits, the Transport block with CRC length of 24 after CRC attachment will be 100 + 24 = 124 bits.

The encoding is performed in a systematic form, which means that in GF(2), the polynomial:
a0D^A+23 + a1D^A+22 + .. + aA-1D^24 + p0D^23 + p1D^22 + .. + P22D^1 + P23
yields a remainder equal to 0 when divided by the corresponding length-24 CRC generator polynomial, gCRC24A(D) or
gCRC24B(D).

Similarly, the polynomial:
a0D^A+15 + a1D^A+14 + .. + aA-1D^16 + p0D^15 + p1D^14 + .. + P14D^1 + P15
yields a remainder equal to 0 when divided by gCRC16(D)

Also the polynomial:
a0D^A+7 + a1D^A+6 + .. + aA-1D^8 + p0D^7 + p1D^6 + .. + P6D^1 + P7

yields a remainder equal to 0 when divided by gCRC8(D).

The bits after CRC attachment are denoted by b0 ,b1 , b2 , b3 ,...,bB−1 , where
B = A+ L. The relation between ak and bk is:
bk = ak for k = 0, 1, 2, …, A-1
bk = p k−A for k = A, A+1, A+2,..., A+L-1.

So, the CRC bits can be 24 or 16 or 8 depending on the Initial configurations & Implementation of the eNodeB in general. Also i dont think, CRC Length will differ for each Transport block as well. In general higher the CRC bit (here 24 bits) better the error detection technique even in worst channel conditions.

Accordingly the Cyclic genertaor polynomial will be used for the computation of CRC & its additiong to the Transport Block.

Note: The Lowest order information a0 will be mapped to the MSB of the transport block as book reading format.

Pls Refer, Spec:36.212 sec 5.1.1 & 5.3.1.1 for further reference.